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| Source: IDT IDT Introduces New Family Of Versaclock™ Devices New Timing Devices Offer Greater Flexibility and Improved Performance for Designers of High-Performance Consumer, Telecommunications, Networking and Data Communications Applications For greatest possible design flexibility, the IDT VersaClock III family features four internal PLLs, each individually programmable and able to generate four unique frequencies. In addition, EMI-reducing spread spectrum technology is available on two of the PLLs, ensuring highest possible signal integrity. For even greater integration, VCXO versions are available to ensure IDT customers receive compatibility with industry timing standards. The new timing devices also feature an I2C interface, providing programmability during normal operation. The internal EEPROM allows the user to save and restore configuration of the device without having to reprogram it on power up, saving valuable design time and maximizing ROI. Moreover, to give designers even greater options, the new VersaClock devices can generate frequencies from 5kHz to 500MHz and are also compatible with many different output types — from single-ended LVCMOS to differential LVDS, LVPECL and HCSL — to support all timing systems in a single device. The VersaClock III devices feature lower jitter and clock redundancy, with a glitchless automatic or manual switchover function that allows the use of a secondary clock source to be selected if a clock error occurs during normal operation of the primary source, helping improve timing and device performance.
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